`timescale 1ns / 1ps

`include "MIPSCPU_COMMON.vh"

module InstructionFetch(
	if_enable,
	pc_value,
	if_out_enable,
	out_pc_value
    );

	input if_enable;
	input[`DATA_WIDTH - 1 : 0] pc_value;
	output reg if_out_enable;
	output reg[`DATA_WIDTH - 1 : 0] out_pc_value;

	always @(*)
	begin
		if_out_enable <= if_enable;
		if (if_enable)
			out_pc_value <= pc_value + `INSTRUCTION_BYTES;
		else
			out_pc_value <= pc_value;
	end
	
endmodule
